Line data Source code
1 : #pragma once
2 :
3 : #include "AP_RangeFinder_config.h"
4 :
5 : #if AP_RANGEFINDER_VL53L1X_ENABLED
6 :
7 : #include "AP_RangeFinder.h"
8 : #include "AP_RangeFinder_Backend.h"
9 :
10 : #include <AP_HAL/I2CDevice.h>
11 :
12 : class AP_RangeFinder_VL53L1X : public AP_RangeFinder_Backend
13 : {
14 :
15 : public:
16 : enum class DistanceMode { Short, Medium, Long, Unknown };
17 :
18 : // static detection function
19 : static AP_RangeFinder_Backend *detect(RangeFinder::RangeFinder_State &_state, AP_RangeFinder_Params &_params, AP_HAL::OwnPtr<AP_HAL::I2CDevice> _dev, DistanceMode mode);
20 :
21 : // update state
22 : void update(void) override;
23 :
24 : protected:
25 :
26 0 : virtual MAV_DISTANCE_SENSOR _get_mav_distance_sensor_type() const override {
27 0 : return MAV_DISTANCE_SENSOR_LASER;
28 : }
29 :
30 : private:
31 : enum DeviceError : uint8_t
32 : {
33 : NOUPDATE = 0,
34 : VCSELCONTINUITYTESTFAILURE = 1,
35 : VCSELWATCHDOGTESTFAILURE = 2,
36 : NOVHVVALUEFOUND = 3,
37 : MSRCNOTARGET = 4,
38 : RANGEPHASECHECK = 5,
39 : SIGMATHRESHOLDCHECK = 6,
40 : PHASECONSISTENCY = 7,
41 : MINCLIP = 8,
42 : RANGECOMPLETE = 9,
43 : ALGOUNDERFLOW = 10,
44 : ALGOOVERFLOW = 11,
45 : RANGEIGNORETHRESHOLD = 12,
46 : USERROICLIP = 13,
47 : REFSPADCHARNOTENOUGHDPADS = 14,
48 : REFSPADCHARMORETHANTARGET = 15,
49 : REFSPADCHARLESSTHANTARGET = 16,
50 : MULTCLIPFAIL = 17,
51 : GPHSTREAMCOUNT0READY = 18,
52 : RANGECOMPLETE_NO_WRAP_CHECK = 19,
53 : EVENTCONSISTENCY = 20,
54 : MINSIGNALEVENTCHECK = 21,
55 : RANGECOMPLETE_MERGED_PULSE = 22,
56 : };
57 :
58 : // register addresses from API vl53l1x_register_map.h
59 : enum regAddr : uint16_t
60 : {
61 : SOFT_RESET = 0x0000,
62 : I2C_SLAVE__DEVICE_ADDRESS = 0x0001,
63 : ANA_CONFIG__VHV_REF_SEL_VDDPIX = 0x0002,
64 : ANA_CONFIG__VHV_REF_SEL_VQUENCH = 0x0003,
65 : ANA_CONFIG__REG_AVDD1V2_SEL = 0x0004,
66 : ANA_CONFIG__FAST_OSC__TRIM = 0x0005,
67 : OSC_MEASURED__FAST_OSC__FREQUENCY = 0x0006,
68 : OSC_MEASURED__FAST_OSC__FREQUENCY_HI = 0x0006,
69 : OSC_MEASURED__FAST_OSC__FREQUENCY_LO = 0x0007,
70 : VHV_CONFIG__TIMEOUT_MACROP_LOOP_BOUND = 0x0008,
71 : VHV_CONFIG__COUNT_THRESH = 0x0009,
72 : VHV_CONFIG__OFFSET = 0x000A,
73 : VHV_CONFIG__INIT = 0x000B,
74 : GLOBAL_CONFIG__SPAD_ENABLES_REF_0 = 0x000D,
75 : GLOBAL_CONFIG__SPAD_ENABLES_REF_1 = 0x000E,
76 : GLOBAL_CONFIG__SPAD_ENABLES_REF_2 = 0x000F,
77 : GLOBAL_CONFIG__SPAD_ENABLES_REF_3 = 0x0010,
78 : GLOBAL_CONFIG__SPAD_ENABLES_REF_4 = 0x0011,
79 : GLOBAL_CONFIG__SPAD_ENABLES_REF_5 = 0x0012,
80 : GLOBAL_CONFIG__REF_EN_START_SELECT = 0x0013,
81 : REF_SPAD_MAN__NUM_REQUESTED_REF_SPADS = 0x0014,
82 : REF_SPAD_MAN__REF_LOCATION = 0x0015,
83 : ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS = 0x0016,
84 : ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS_HI = 0x0016,
85 : ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS_LO = 0x0017,
86 : ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS = 0x0018,
87 : ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS_HI = 0x0018,
88 : ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS_LO = 0x0019,
89 : ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS = 0x001A,
90 : ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS_HI = 0x001A,
91 : ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS_LO = 0x001B,
92 : REF_SPAD_CHAR__TOTAL_RATE_TARGET_MCPS = 0x001C,
93 : REF_SPAD_CHAR__TOTAL_RATE_TARGET_MCPS_HI = 0x001C,
94 : REF_SPAD_CHAR__TOTAL_RATE_TARGET_MCPS_LO = 0x001D,
95 : ALGO__PART_TO_PART_RANGE_OFFSET_MM = 0x001E,
96 : ALGO__PART_TO_PART_RANGE_OFFSET_MM_HI = 0x001E,
97 : ALGO__PART_TO_PART_RANGE_OFFSET_MM_LO = 0x001F,
98 : MM_CONFIG__INNER_OFFSET_MM = 0x0020,
99 : MM_CONFIG__INNER_OFFSET_MM_HI = 0x0020,
100 : MM_CONFIG__INNER_OFFSET_MM_LO = 0x0021,
101 : MM_CONFIG__OUTER_OFFSET_MM = 0x0022,
102 : MM_CONFIG__OUTER_OFFSET_MM_HI = 0x0022,
103 : MM_CONFIG__OUTER_OFFSET_MM_LO = 0x0023,
104 : DSS_CONFIG__TARGET_TOTAL_RATE_MCPS = 0x0024,
105 : DSS_CONFIG__TARGET_TOTAL_RATE_MCPS_HI = 0x0024,
106 : DSS_CONFIG__TARGET_TOTAL_RATE_MCPS_LO = 0x0025,
107 : DEBUG__CTRL = 0x0026,
108 : TEST_MODE__CTRL = 0x0027,
109 : CLK_GATING__CTRL = 0x0028,
110 : NVM_BIST__CTRL = 0x0029,
111 : NVM_BIST__NUM_NVM_WORDS = 0x002A,
112 : NVM_BIST__START_ADDRESS = 0x002B,
113 : HOST_IF__STATUS = 0x002C,
114 : PAD_I2C_HV__CONFIG = 0x002D,
115 : PAD_I2C_HV__EXTSUP_CONFIG = 0x002E,
116 : GPIO_HV_PAD__CTRL = 0x002F,
117 : GPIO_HV_MUX__CTRL = 0x0030,
118 : GPIO__TIO_HV_STATUS = 0x0031,
119 : GPIO__FIO_HV_STATUS = 0x0032,
120 : ANA_CONFIG__SPAD_SEL_PSWIDTH = 0x0033,
121 : ANA_CONFIG__VCSEL_PULSE_WIDTH_OFFSET = 0x0034,
122 : ANA_CONFIG__FAST_OSC__CONFIG_CTRL = 0x0035,
123 : SIGMA_ESTIMATOR__EFFECTIVE_PULSE_WIDTH_NS = 0x0036,
124 : SIGMA_ESTIMATOR__EFFECTIVE_AMBIENT_WIDTH_NS = 0x0037,
125 : SIGMA_ESTIMATOR__SIGMA_REF_MM = 0x0038,
126 : ALGO__CROSSTALK_COMPENSATION_VALID_HEIGHT_MM = 0x0039,
127 : SPARE_HOST_CONFIG__STATIC_CONFIG_SPARE_0 = 0x003A,
128 : SPARE_HOST_CONFIG__STATIC_CONFIG_SPARE_1 = 0x003B,
129 : ALGO__RANGE_IGNORE_THRESHOLD_MCPS = 0x003C,
130 : ALGO__RANGE_IGNORE_THRESHOLD_MCPS_HI = 0x003C,
131 : ALGO__RANGE_IGNORE_THRESHOLD_MCPS_LO = 0x003D,
132 : ALGO__RANGE_IGNORE_VALID_HEIGHT_MM = 0x003E,
133 : ALGO__RANGE_MIN_CLIP = 0x003F,
134 : ALGO__CONSISTENCY_CHECK__TOLERANCE = 0x0040,
135 : SPARE_HOST_CONFIG__STATIC_CONFIG_SPARE_2 = 0x0041,
136 : SD_CONFIG__RESET_STAGES_MSB = 0x0042,
137 : SD_CONFIG__RESET_STAGES_LSB = 0x0043,
138 : GPH_CONFIG__STREAM_COUNT_UPDATE_VALUE = 0x0044,
139 : GLOBAL_CONFIG__STREAM_DIVIDER = 0x0045,
140 : SYSTEM__INTERRUPT_CONFIG_GPIO = 0x0046,
141 : CAL_CONFIG__VCSEL_START = 0x0047,
142 : CAL_CONFIG__REPEAT_RATE = 0x0048,
143 : CAL_CONFIG__REPEAT_RATE_HI = 0x0048,
144 : CAL_CONFIG__REPEAT_RATE_LO = 0x0049,
145 : GLOBAL_CONFIG__VCSEL_WIDTH = 0x004A,
146 : PHASECAL_CONFIG__TIMEOUT_MACROP = 0x004B,
147 : PHASECAL_CONFIG__TARGET = 0x004C,
148 : PHASECAL_CONFIG__OVERRIDE = 0x004D,
149 : DSS_CONFIG__ROI_MODE_CONTROL = 0x004F,
150 : SYSTEM__THRESH_RATE_HIGH = 0x0050,
151 : SYSTEM__THRESH_RATE_HIGH_HI = 0x0050,
152 : SYSTEM__THRESH_RATE_HIGH_LO = 0x0051,
153 : SYSTEM__THRESH_RATE_LOW = 0x0052,
154 : SYSTEM__THRESH_RATE_LOW_HI = 0x0052,
155 : SYSTEM__THRESH_RATE_LOW_LO = 0x0053,
156 : DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT = 0x0054,
157 : DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_HI = 0x0054,
158 : DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_LO = 0x0055,
159 : DSS_CONFIG__MANUAL_BLOCK_SELECT = 0x0056,
160 : DSS_CONFIG__APERTURE_ATTENUATION = 0x0057,
161 : DSS_CONFIG__MAX_SPADS_LIMIT = 0x0058,
162 : DSS_CONFIG__MIN_SPADS_LIMIT = 0x0059,
163 : MM_CONFIG__TIMEOUT_MACROP_A = 0x005A, // added by Pololu for 16-bit accesses
164 : MM_CONFIG__TIMEOUT_MACROP_A_HI = 0x005A,
165 : MM_CONFIG__TIMEOUT_MACROP_A_LO = 0x005B,
166 : MM_CONFIG__TIMEOUT_MACROP_B = 0x005C, // added by Pololu for 16-bit accesses
167 : MM_CONFIG__TIMEOUT_MACROP_B_HI = 0x005C,
168 : MM_CONFIG__TIMEOUT_MACROP_B_LO = 0x005D,
169 : RANGE_CONFIG__TIMEOUT_MACROP_A = 0x005E, // added by Pololu for 16-bit accesses
170 : RANGE_CONFIG__TIMEOUT_MACROP_A_HI = 0x005E,
171 : RANGE_CONFIG__TIMEOUT_MACROP_A_LO = 0x005F,
172 : RANGE_CONFIG__VCSEL_PERIOD_A = 0x0060,
173 : RANGE_CONFIG__TIMEOUT_MACROP_B = 0x0061, // added by Pololu for 16-bit accesses
174 : RANGE_CONFIG__TIMEOUT_MACROP_B_HI = 0x0061,
175 : RANGE_CONFIG__TIMEOUT_MACROP_B_LO = 0x0062,
176 : RANGE_CONFIG__VCSEL_PERIOD_B = 0x0063,
177 : RANGE_CONFIG__SIGMA_THRESH = 0x0064,
178 : RANGE_CONFIG__SIGMA_THRESH_HI = 0x0064,
179 : RANGE_CONFIG__SIGMA_THRESH_LO = 0x0065,
180 : RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS = 0x0066,
181 : RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_HI = 0x0066,
182 : RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_LO = 0x0067,
183 : RANGE_CONFIG__VALID_PHASE_LOW = 0x0068,
184 : RANGE_CONFIG__VALID_PHASE_HIGH = 0x0069,
185 : SYSTEM__INTERMEASUREMENT_PERIOD = 0x006C,
186 : SYSTEM__INTERMEASUREMENT_PERIOD_3 = 0x006C,
187 : SYSTEM__INTERMEASUREMENT_PERIOD_2 = 0x006D,
188 : SYSTEM__INTERMEASUREMENT_PERIOD_1 = 0x006E,
189 : SYSTEM__INTERMEASUREMENT_PERIOD_0 = 0x006F,
190 : SYSTEM__FRACTIONAL_ENABLE = 0x0070,
191 : SYSTEM__GROUPED_PARAMETER_HOLD_0 = 0x0071,
192 : SYSTEM__THRESH_HIGH = 0x0072,
193 : SYSTEM__THRESH_HIGH_HI = 0x0072,
194 : SYSTEM__THRESH_HIGH_LO = 0x0073,
195 : SYSTEM__THRESH_LOW = 0x0074,
196 : SYSTEM__THRESH_LOW_HI = 0x0074,
197 : SYSTEM__THRESH_LOW_LO = 0x0075,
198 : SYSTEM__ENABLE_XTALK_PER_QUADRANT = 0x0076,
199 : SYSTEM__SEED_CONFIG = 0x0077,
200 : SD_CONFIG__WOI_SD0 = 0x0078,
201 : SD_CONFIG__WOI_SD1 = 0x0079,
202 : SD_CONFIG__INITIAL_PHASE_SD0 = 0x007A,
203 : SD_CONFIG__INITIAL_PHASE_SD1 = 0x007B,
204 : SYSTEM__GROUPED_PARAMETER_HOLD_1 = 0x007C,
205 : SD_CONFIG__FIRST_ORDER_SELECT = 0x007D,
206 : SD_CONFIG__QUANTIFIER = 0x007E,
207 : ROI_CONFIG__USER_ROI_CENTRE_SPAD = 0x007F,
208 : ROI_CONFIG__USER_ROI_REQUESTED_GLOBAL_XY_SIZE = 0x0080,
209 : SYSTEM__SEQUENCE_CONFIG = 0x0081,
210 : SYSTEM__GROUPED_PARAMETER_HOLD = 0x0082,
211 : POWER_MANAGEMENT__GO1_POWER_FORCE = 0x0083,
212 : SYSTEM__STREAM_COUNT_CTRL = 0x0084,
213 : FIRMWARE__ENABLE = 0x0085,
214 : SYSTEM__INTERRUPT_CLEAR = 0x0086,
215 : SYSTEM__MODE_START = 0x0087,
216 : RESULT__INTERRUPT_STATUS = 0x0088,
217 : RESULT__RANGE_STATUS = 0x0089,
218 : RESULT__REPORT_STATUS = 0x008A,
219 : RESULT__STREAM_COUNT = 0x008B,
220 : RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0 = 0x008C,
221 : RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_HI = 0x008C,
222 : RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_LO = 0x008D,
223 : RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0 = 0x008E,
224 : RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_HI = 0x008E,
225 : RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_LO = 0x008F,
226 : RESULT__AMBIENT_COUNT_RATE_MCPS_SD0 = 0x0090,
227 : RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_HI = 0x0090,
228 : RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_LO = 0x0091,
229 : RESULT__SIGMA_SD0 = 0x0092,
230 : RESULT__SIGMA_SD0_HI = 0x0092,
231 : RESULT__SIGMA_SD0_LO = 0x0093,
232 : RESULT__PHASE_SD0 = 0x0094,
233 : RESULT__PHASE_SD0_HI = 0x0094,
234 : RESULT__PHASE_SD0_LO = 0x0095,
235 : RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0 = 0x0096,
236 : RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_HI = 0x0096,
237 : RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_LO = 0x0097,
238 : RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0 = 0x0098,
239 : RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_HI = 0x0098,
240 : RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_LO = 0x0099,
241 : RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0 = 0x009A,
242 : RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_HI = 0x009A,
243 : RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_LO = 0x009B,
244 : RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0 = 0x009C,
245 : RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_HI = 0x009C,
246 : RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_LO = 0x009D,
247 : RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0 = 0x009E,
248 : RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_HI = 0x009E,
249 : RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_LO = 0x009F,
250 : RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1 = 0x00A0,
251 : RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_HI = 0x00A0,
252 : RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_LO = 0x00A1,
253 : RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1 = 0x00A2,
254 : RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_HI = 0x00A2,
255 : RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_LO = 0x00A3,
256 : RESULT__AMBIENT_COUNT_RATE_MCPS_SD1 = 0x00A4,
257 : RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_HI = 0x00A4,
258 : RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_LO = 0x00A5,
259 : RESULT__SIGMA_SD1 = 0x00A6,
260 : RESULT__SIGMA_SD1_HI = 0x00A6,
261 : RESULT__SIGMA_SD1_LO = 0x00A7,
262 : RESULT__PHASE_SD1 = 0x00A8,
263 : RESULT__PHASE_SD1_HI = 0x00A8,
264 : RESULT__PHASE_SD1_LO = 0x00A9,
265 : RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1 = 0x00AA,
266 : RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_HI = 0x00AA,
267 : RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_LO = 0x00AB,
268 : RESULT__SPARE_0_SD1 = 0x00AC,
269 : RESULT__SPARE_0_SD1_HI = 0x00AC,
270 : RESULT__SPARE_0_SD1_LO = 0x00AD,
271 : RESULT__SPARE_1_SD1 = 0x00AE,
272 : RESULT__SPARE_1_SD1_HI = 0x00AE,
273 : RESULT__SPARE_1_SD1_LO = 0x00AF,
274 : RESULT__SPARE_2_SD1 = 0x00B0,
275 : RESULT__SPARE_2_SD1_HI = 0x00B0,
276 : RESULT__SPARE_2_SD1_LO = 0x00B1,
277 : RESULT__SPARE_3_SD1 = 0x00B2,
278 : RESULT__THRESH_INFO = 0x00B3,
279 : RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0 = 0x00B4,
280 : RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_3 = 0x00B4,
281 : RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_2 = 0x00B5,
282 : RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_1 = 0x00B6,
283 : RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_0 = 0x00B7,
284 : RESULT_CORE__RANGING_TOTAL_EVENTS_SD0 = 0x00B8,
285 : RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_3 = 0x00B8,
286 : RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_2 = 0x00B9,
287 : RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_1 = 0x00BA,
288 : RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_0 = 0x00BB,
289 : RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0 = 0x00BC,
290 : RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_3 = 0x00BC,
291 : RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_2 = 0x00BD,
292 : RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_1 = 0x00BE,
293 : RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_0 = 0x00BF,
294 : RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0 = 0x00C0,
295 : RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_3 = 0x00C0,
296 : RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_2 = 0x00C1,
297 : RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_1 = 0x00C2,
298 : RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_0 = 0x00C3,
299 : RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1 = 0x00C4,
300 : RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_3 = 0x00C4,
301 : RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_2 = 0x00C5,
302 : RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_1 = 0x00C6,
303 : RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_0 = 0x00C7,
304 : RESULT_CORE__RANGING_TOTAL_EVENTS_SD1 = 0x00C8,
305 : RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_3 = 0x00C8,
306 : RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_2 = 0x00C9,
307 : RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_1 = 0x00CA,
308 : RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_0 = 0x00CB,
309 : RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1 = 0x00CC,
310 : RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_3 = 0x00CC,
311 : RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_2 = 0x00CD,
312 : RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_1 = 0x00CE,
313 : RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_0 = 0x00CF,
314 : RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1 = 0x00D0,
315 : RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_3 = 0x00D0,
316 : RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_2 = 0x00D1,
317 : RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_1 = 0x00D2,
318 : RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_0 = 0x00D3,
319 : RESULT_CORE__SPARE_0 = 0x00D4,
320 : PHASECAL_RESULT__REFERENCE_PHASE = 0x00D6,
321 : PHASECAL_RESULT__REFERENCE_PHASE_HI = 0x00D6,
322 : PHASECAL_RESULT__REFERENCE_PHASE_LO = 0x00D7,
323 : PHASECAL_RESULT__VCSEL_START = 0x00D8,
324 : REF_SPAD_CHAR_RESULT__NUM_ACTUAL_REF_SPADS = 0x00D9,
325 : REF_SPAD_CHAR_RESULT__REF_LOCATION = 0x00DA,
326 : VHV_RESULT__COLDBOOT_STATUS = 0x00DB,
327 : VHV_RESULT__SEARCH_RESULT = 0x00DC,
328 : VHV_RESULT__LATEST_SETTING = 0x00DD,
329 : RESULT__OSC_CALIBRATE_VAL = 0x00DE,
330 : RESULT__OSC_CALIBRATE_VAL_HI = 0x00DE,
331 : RESULT__OSC_CALIBRATE_VAL_LO = 0x00DF,
332 : ANA_CONFIG__POWERDOWN_GO1 = 0x00E0,
333 : ANA_CONFIG__REF_BG_CTRL = 0x00E1,
334 : ANA_CONFIG__REGDVDD1V2_CTRL = 0x00E2,
335 : ANA_CONFIG__OSC_SLOW_CTRL = 0x00E3,
336 : TEST_MODE__STATUS = 0x00E4,
337 : FIRMWARE__SYSTEM_STATUS = 0x00E5,
338 : FIRMWARE__MODE_STATUS = 0x00E6,
339 : FIRMWARE__SECONDARY_MODE_STATUS = 0x00E7,
340 : FIRMWARE__CAL_REPEAT_RATE_COUNTER = 0x00E8,
341 : FIRMWARE__CAL_REPEAT_RATE_COUNTER_HI = 0x00E8,
342 : FIRMWARE__CAL_REPEAT_RATE_COUNTER_LO = 0x00E9,
343 : FIRMWARE__HISTOGRAM_BIN = 0x00EA,
344 : GPH__SYSTEM__THRESH_HIGH = 0x00EC,
345 : GPH__SYSTEM__THRESH_HIGH_HI = 0x00EC,
346 : GPH__SYSTEM__THRESH_HIGH_LO = 0x00ED,
347 : GPH__SYSTEM__THRESH_LOW = 0x00EE,
348 : GPH__SYSTEM__THRESH_LOW_HI = 0x00EE,
349 : GPH__SYSTEM__THRESH_LOW_LO = 0x00EF,
350 : GPH__SYSTEM__ENABLE_XTALK_PER_QUADRANT = 0x00F0,
351 : GPH__SPARE_0 = 0x00F1,
352 : GPH__SD_CONFIG__WOI_SD0 = 0x00F2,
353 : GPH__SD_CONFIG__WOI_SD1 = 0x00F3,
354 : GPH__SD_CONFIG__INITIAL_PHASE_SD0 = 0x00F4,
355 : GPH__SD_CONFIG__INITIAL_PHASE_SD1 = 0x00F5,
356 : GPH__SD_CONFIG__FIRST_ORDER_SELECT = 0x00F6,
357 : GPH__SD_CONFIG__QUANTIFIER = 0x00F7,
358 : GPH__ROI_CONFIG__USER_ROI_CENTRE_SPAD = 0x00F8,
359 : GPH__ROI_CONFIG__USER_ROI_REQUESTED_GLOBAL_XY_SIZE = 0x00F9,
360 : GPH__SYSTEM__SEQUENCE_CONFIG = 0x00FA,
361 : GPH__GPH_ID = 0x00FB,
362 : SYSTEM__INTERRUPT_SET = 0x00FC,
363 : INTERRUPT_MANAGER__ENABLES = 0x00FD,
364 : INTERRUPT_MANAGER__CLEAR = 0x00FE,
365 : INTERRUPT_MANAGER__STATUS = 0x00FF,
366 : MCU_TO_HOST_BANK__WR_ACCESS_EN = 0x0100,
367 : POWER_MANAGEMENT__GO1_RESET_STATUS = 0x0101,
368 : PAD_STARTUP_MODE__VALUE_RO = 0x0102,
369 : PAD_STARTUP_MODE__VALUE_CTRL = 0x0103,
370 : PLL_PERIOD_US = 0x0104,
371 : PLL_PERIOD_US_3 = 0x0104,
372 : PLL_PERIOD_US_2 = 0x0105,
373 : PLL_PERIOD_US_1 = 0x0106,
374 : PLL_PERIOD_US_0 = 0x0107,
375 : INTERRUPT_SCHEDULER__DATA_OUT = 0x0108,
376 : INTERRUPT_SCHEDULER__DATA_OUT_3 = 0x0108,
377 : INTERRUPT_SCHEDULER__DATA_OUT_2 = 0x0109,
378 : INTERRUPT_SCHEDULER__DATA_OUT_1 = 0x010A,
379 : INTERRUPT_SCHEDULER__DATA_OUT_0 = 0x010B,
380 : NVM_BIST__COMPLETE = 0x010C,
381 : NVM_BIST__STATUS = 0x010D,
382 : IDENTIFICATION__MODEL_ID = 0x010F,
383 : IDENTIFICATION__MODULE_TYPE = 0x0110,
384 : IDENTIFICATION__REVISION_ID = 0x0111,
385 : IDENTIFICATION__MODULE_ID = 0x0112,
386 : IDENTIFICATION__MODULE_ID_HI = 0x0112,
387 : IDENTIFICATION__MODULE_ID_LO = 0x0113,
388 : ANA_CONFIG__FAST_OSC__TRIM_MAX = 0x0114,
389 : ANA_CONFIG__FAST_OSC__FREQ_SET = 0x0115,
390 : ANA_CONFIG__VCSEL_TRIM = 0x0116,
391 : ANA_CONFIG__VCSEL_SELION = 0x0117,
392 : ANA_CONFIG__VCSEL_SELION_MAX = 0x0118,
393 : PROTECTED_LASER_SAFETY__LOCK_BIT = 0x0119,
394 : LASER_SAFETY__KEY = 0x011A,
395 : LASER_SAFETY__KEY_RO = 0x011B,
396 : LASER_SAFETY__CLIP = 0x011C,
397 : LASER_SAFETY__MULT = 0x011D,
398 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_0 = 0x011E,
399 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_1 = 0x011F,
400 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_2 = 0x0120,
401 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_3 = 0x0121,
402 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_4 = 0x0122,
403 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_5 = 0x0123,
404 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_6 = 0x0124,
405 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_7 = 0x0125,
406 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_8 = 0x0126,
407 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_9 = 0x0127,
408 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_10 = 0x0128,
409 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_11 = 0x0129,
410 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_12 = 0x012A,
411 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_13 = 0x012B,
412 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_14 = 0x012C,
413 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_15 = 0x012D,
414 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_16 = 0x012E,
415 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_17 = 0x012F,
416 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_18 = 0x0130,
417 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_19 = 0x0131,
418 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_20 = 0x0132,
419 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_21 = 0x0133,
420 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_22 = 0x0134,
421 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_23 = 0x0135,
422 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_24 = 0x0136,
423 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_25 = 0x0137,
424 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_26 = 0x0138,
425 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_27 = 0x0139,
426 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_28 = 0x013A,
427 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_29 = 0x013B,
428 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_30 = 0x013C,
429 : GLOBAL_CONFIG__SPAD_ENABLES_RTN_31 = 0x013D,
430 : ROI_CONFIG__MODE_ROI_CENTRE_SPAD = 0x013E,
431 : ROI_CONFIG__MODE_ROI_XY_SIZE = 0x013F,
432 : GO2_HOST_BANK_ACCESS__OVERRIDE = 0x0300,
433 : MCU_UTIL_MULTIPLIER__MULTIPLICAND = 0x0400,
434 : MCU_UTIL_MULTIPLIER__MULTIPLICAND_3 = 0x0400,
435 : MCU_UTIL_MULTIPLIER__MULTIPLICAND_2 = 0x0401,
436 : MCU_UTIL_MULTIPLIER__MULTIPLICAND_1 = 0x0402,
437 : MCU_UTIL_MULTIPLIER__MULTIPLICAND_0 = 0x0403,
438 : MCU_UTIL_MULTIPLIER__MULTIPLIER = 0x0404,
439 : MCU_UTIL_MULTIPLIER__MULTIPLIER_3 = 0x0404,
440 : MCU_UTIL_MULTIPLIER__MULTIPLIER_2 = 0x0405,
441 : MCU_UTIL_MULTIPLIER__MULTIPLIER_1 = 0x0406,
442 : MCU_UTIL_MULTIPLIER__MULTIPLIER_0 = 0x0407,
443 : MCU_UTIL_MULTIPLIER__PRODUCT_HI = 0x0408,
444 : MCU_UTIL_MULTIPLIER__PRODUCT_HI_3 = 0x0408,
445 : MCU_UTIL_MULTIPLIER__PRODUCT_HI_2 = 0x0409,
446 : MCU_UTIL_MULTIPLIER__PRODUCT_HI_1 = 0x040A,
447 : MCU_UTIL_MULTIPLIER__PRODUCT_HI_0 = 0x040B,
448 : MCU_UTIL_MULTIPLIER__PRODUCT_LO = 0x040C,
449 : MCU_UTIL_MULTIPLIER__PRODUCT_LO_3 = 0x040C,
450 : MCU_UTIL_MULTIPLIER__PRODUCT_LO_2 = 0x040D,
451 : MCU_UTIL_MULTIPLIER__PRODUCT_LO_1 = 0x040E,
452 : MCU_UTIL_MULTIPLIER__PRODUCT_LO_0 = 0x040F,
453 : MCU_UTIL_MULTIPLIER__START = 0x0410,
454 : MCU_UTIL_MULTIPLIER__STATUS = 0x0411,
455 : MCU_UTIL_DIVIDER__START = 0x0412,
456 : MCU_UTIL_DIVIDER__STATUS = 0x0413,
457 : MCU_UTIL_DIVIDER__DIVIDEND = 0x0414,
458 : MCU_UTIL_DIVIDER__DIVIDEND_3 = 0x0414,
459 : MCU_UTIL_DIVIDER__DIVIDEND_2 = 0x0415,
460 : MCU_UTIL_DIVIDER__DIVIDEND_1 = 0x0416,
461 : MCU_UTIL_DIVIDER__DIVIDEND_0 = 0x0417,
462 : MCU_UTIL_DIVIDER__DIVISOR = 0x0418,
463 : MCU_UTIL_DIVIDER__DIVISOR_3 = 0x0418,
464 : MCU_UTIL_DIVIDER__DIVISOR_2 = 0x0419,
465 : MCU_UTIL_DIVIDER__DIVISOR_1 = 0x041A,
466 : MCU_UTIL_DIVIDER__DIVISOR_0 = 0x041B,
467 : MCU_UTIL_DIVIDER__QUOTIENT = 0x041C,
468 : MCU_UTIL_DIVIDER__QUOTIENT_3 = 0x041C,
469 : MCU_UTIL_DIVIDER__QUOTIENT_2 = 0x041D,
470 : MCU_UTIL_DIVIDER__QUOTIENT_1 = 0x041E,
471 : MCU_UTIL_DIVIDER__QUOTIENT_0 = 0x041F,
472 : TIMER0__VALUE_IN = 0x0420,
473 : TIMER0__VALUE_IN_3 = 0x0420,
474 : TIMER0__VALUE_IN_2 = 0x0421,
475 : TIMER0__VALUE_IN_1 = 0x0422,
476 : TIMER0__VALUE_IN_0 = 0x0423,
477 : TIMER1__VALUE_IN = 0x0424,
478 : TIMER1__VALUE_IN_3 = 0x0424,
479 : TIMER1__VALUE_IN_2 = 0x0425,
480 : TIMER1__VALUE_IN_1 = 0x0426,
481 : TIMER1__VALUE_IN_0 = 0x0427,
482 : TIMER0__CTRL = 0x0428,
483 : TIMER1__CTRL = 0x0429,
484 : MCU_GENERAL_PURPOSE__GP_0 = 0x042C,
485 : MCU_GENERAL_PURPOSE__GP_1 = 0x042D,
486 : MCU_GENERAL_PURPOSE__GP_2 = 0x042E,
487 : MCU_GENERAL_PURPOSE__GP_3 = 0x042F,
488 : MCU_RANGE_CALC__CONFIG = 0x0430,
489 : MCU_RANGE_CALC__OFFSET_CORRECTED_RANGE = 0x0432,
490 : MCU_RANGE_CALC__OFFSET_CORRECTED_RANGE_HI = 0x0432,
491 : MCU_RANGE_CALC__OFFSET_CORRECTED_RANGE_LO = 0x0433,
492 : MCU_RANGE_CALC__SPARE_4 = 0x0434,
493 : MCU_RANGE_CALC__SPARE_4_3 = 0x0434,
494 : MCU_RANGE_CALC__SPARE_4_2 = 0x0435,
495 : MCU_RANGE_CALC__SPARE_4_1 = 0x0436,
496 : MCU_RANGE_CALC__SPARE_4_0 = 0x0437,
497 : MCU_RANGE_CALC__AMBIENT_DURATION_PRE_CALC = 0x0438,
498 : MCU_RANGE_CALC__AMBIENT_DURATION_PRE_CALC_HI = 0x0438,
499 : MCU_RANGE_CALC__AMBIENT_DURATION_PRE_CALC_LO = 0x0439,
500 : MCU_RANGE_CALC__ALGO_VCSEL_PERIOD = 0x043C,
501 : MCU_RANGE_CALC__SPARE_5 = 0x043D,
502 : MCU_RANGE_CALC__ALGO_TOTAL_PERIODS = 0x043E,
503 : MCU_RANGE_CALC__ALGO_TOTAL_PERIODS_HI = 0x043E,
504 : MCU_RANGE_CALC__ALGO_TOTAL_PERIODS_LO = 0x043F,
505 : MCU_RANGE_CALC__ALGO_ACCUM_PHASE = 0x0440,
506 : MCU_RANGE_CALC__ALGO_ACCUM_PHASE_3 = 0x0440,
507 : MCU_RANGE_CALC__ALGO_ACCUM_PHASE_2 = 0x0441,
508 : MCU_RANGE_CALC__ALGO_ACCUM_PHASE_1 = 0x0442,
509 : MCU_RANGE_CALC__ALGO_ACCUM_PHASE_0 = 0x0443,
510 : MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS = 0x0444,
511 : MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_3 = 0x0444,
512 : MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_2 = 0x0445,
513 : MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_1 = 0x0446,
514 : MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_0 = 0x0447,
515 : MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS = 0x0448,
516 : MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_3 = 0x0448,
517 : MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_2 = 0x0449,
518 : MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_1 = 0x044A,
519 : MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_0 = 0x044B,
520 : MCU_RANGE_CALC__SPARE_6 = 0x044C,
521 : MCU_RANGE_CALC__SPARE_6_HI = 0x044C,
522 : MCU_RANGE_CALC__SPARE_6_LO = 0x044D,
523 : MCU_RANGE_CALC__ALGO_ADJUST_VCSEL_PERIOD = 0x044E,
524 : MCU_RANGE_CALC__ALGO_ADJUST_VCSEL_PERIOD_HI = 0x044E,
525 : MCU_RANGE_CALC__ALGO_ADJUST_VCSEL_PERIOD_LO = 0x044F,
526 : MCU_RANGE_CALC__NUM_SPADS = 0x0450,
527 : MCU_RANGE_CALC__NUM_SPADS_HI = 0x0450,
528 : MCU_RANGE_CALC__NUM_SPADS_LO = 0x0451,
529 : MCU_RANGE_CALC__PHASE_OUTPUT = 0x0452,
530 : MCU_RANGE_CALC__PHASE_OUTPUT_HI = 0x0452,
531 : MCU_RANGE_CALC__PHASE_OUTPUT_LO = 0x0453,
532 : MCU_RANGE_CALC__RATE_PER_SPAD_MCPS = 0x0454,
533 : MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_3 = 0x0454,
534 : MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_2 = 0x0455,
535 : MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_1 = 0x0456,
536 : MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_0 = 0x0457,
537 : MCU_RANGE_CALC__SPARE_7 = 0x0458,
538 : MCU_RANGE_CALC__SPARE_8 = 0x0459,
539 : MCU_RANGE_CALC__PEAK_SIGNAL_RATE_MCPS = 0x045A,
540 : MCU_RANGE_CALC__PEAK_SIGNAL_RATE_MCPS_HI = 0x045A,
541 : MCU_RANGE_CALC__PEAK_SIGNAL_RATE_MCPS_LO = 0x045B,
542 : MCU_RANGE_CALC__AVG_SIGNAL_RATE_MCPS = 0x045C,
543 : MCU_RANGE_CALC__AVG_SIGNAL_RATE_MCPS_HI = 0x045C,
544 : MCU_RANGE_CALC__AVG_SIGNAL_RATE_MCPS_LO = 0x045D,
545 : MCU_RANGE_CALC__AMBIENT_RATE_MCPS = 0x045E,
546 : MCU_RANGE_CALC__AMBIENT_RATE_MCPS_HI = 0x045E,
547 : MCU_RANGE_CALC__AMBIENT_RATE_MCPS_LO = 0x045F,
548 : MCU_RANGE_CALC__XTALK = 0x0460,
549 : MCU_RANGE_CALC__XTALK_HI = 0x0460,
550 : MCU_RANGE_CALC__XTALK_LO = 0x0461,
551 : MCU_RANGE_CALC__CALC_STATUS = 0x0462,
552 : MCU_RANGE_CALC__DEBUG = 0x0463,
553 : MCU_RANGE_CALC__PEAK_SIGNAL_RATE_XTALK_CORR_MCPS = 0x0464,
554 : MCU_RANGE_CALC__PEAK_SIGNAL_RATE_XTALK_CORR_MCPS_HI = 0x0464,
555 : MCU_RANGE_CALC__PEAK_SIGNAL_RATE_XTALK_CORR_MCPS_LO = 0x0465,
556 : MCU_RANGE_CALC__SPARE_0 = 0x0468,
557 : MCU_RANGE_CALC__SPARE_1 = 0x0469,
558 : MCU_RANGE_CALC__SPARE_2 = 0x046A,
559 : MCU_RANGE_CALC__SPARE_3 = 0x046B,
560 : PATCH__CTRL = 0x0470,
561 : PATCH__JMP_ENABLES = 0x0472,
562 : PATCH__JMP_ENABLES_HI = 0x0472,
563 : PATCH__JMP_ENABLES_LO = 0x0473,
564 : PATCH__DATA_ENABLES = 0x0474,
565 : PATCH__DATA_ENABLES_HI = 0x0474,
566 : PATCH__DATA_ENABLES_LO = 0x0475,
567 : PATCH__OFFSET_0 = 0x0476,
568 : PATCH__OFFSET_0_HI = 0x0476,
569 : PATCH__OFFSET_0_LO = 0x0477,
570 : PATCH__OFFSET_1 = 0x0478,
571 : PATCH__OFFSET_1_HI = 0x0478,
572 : PATCH__OFFSET_1_LO = 0x0479,
573 : PATCH__OFFSET_2 = 0x047A,
574 : PATCH__OFFSET_2_HI = 0x047A,
575 : PATCH__OFFSET_2_LO = 0x047B,
576 : PATCH__OFFSET_3 = 0x047C,
577 : PATCH__OFFSET_3_HI = 0x047C,
578 : PATCH__OFFSET_3_LO = 0x047D,
579 : PATCH__OFFSET_4 = 0x047E,
580 : PATCH__OFFSET_4_HI = 0x047E,
581 : PATCH__OFFSET_4_LO = 0x047F,
582 : PATCH__OFFSET_5 = 0x0480,
583 : PATCH__OFFSET_5_HI = 0x0480,
584 : PATCH__OFFSET_5_LO = 0x0481,
585 : PATCH__OFFSET_6 = 0x0482,
586 : PATCH__OFFSET_6_HI = 0x0482,
587 : PATCH__OFFSET_6_LO = 0x0483,
588 : PATCH__OFFSET_7 = 0x0484,
589 : PATCH__OFFSET_7_HI = 0x0484,
590 : PATCH__OFFSET_7_LO = 0x0485,
591 : PATCH__OFFSET_8 = 0x0486,
592 : PATCH__OFFSET_8_HI = 0x0486,
593 : PATCH__OFFSET_8_LO = 0x0487,
594 : PATCH__OFFSET_9 = 0x0488,
595 : PATCH__OFFSET_9_HI = 0x0488,
596 : PATCH__OFFSET_9_LO = 0x0489,
597 : PATCH__OFFSET_10 = 0x048A,
598 : PATCH__OFFSET_10_HI = 0x048A,
599 : PATCH__OFFSET_10_LO = 0x048B,
600 : PATCH__OFFSET_11 = 0x048C,
601 : PATCH__OFFSET_11_HI = 0x048C,
602 : PATCH__OFFSET_11_LO = 0x048D,
603 : PATCH__OFFSET_12 = 0x048E,
604 : PATCH__OFFSET_12_HI = 0x048E,
605 : PATCH__OFFSET_12_LO = 0x048F,
606 : PATCH__OFFSET_13 = 0x0490,
607 : PATCH__OFFSET_13_HI = 0x0490,
608 : PATCH__OFFSET_13_LO = 0x0491,
609 : PATCH__OFFSET_14 = 0x0492,
610 : PATCH__OFFSET_14_HI = 0x0492,
611 : PATCH__OFFSET_14_LO = 0x0493,
612 : PATCH__OFFSET_15 = 0x0494,
613 : PATCH__OFFSET_15_HI = 0x0494,
614 : PATCH__OFFSET_15_LO = 0x0495,
615 : PATCH__ADDRESS_0 = 0x0496,
616 : PATCH__ADDRESS_0_HI = 0x0496,
617 : PATCH__ADDRESS_0_LO = 0x0497,
618 : PATCH__ADDRESS_1 = 0x0498,
619 : PATCH__ADDRESS_1_HI = 0x0498,
620 : PATCH__ADDRESS_1_LO = 0x0499,
621 : PATCH__ADDRESS_2 = 0x049A,
622 : PATCH__ADDRESS_2_HI = 0x049A,
623 : PATCH__ADDRESS_2_LO = 0x049B,
624 : PATCH__ADDRESS_3 = 0x049C,
625 : PATCH__ADDRESS_3_HI = 0x049C,
626 : PATCH__ADDRESS_3_LO = 0x049D,
627 : PATCH__ADDRESS_4 = 0x049E,
628 : PATCH__ADDRESS_4_HI = 0x049E,
629 : PATCH__ADDRESS_4_LO = 0x049F,
630 : PATCH__ADDRESS_5 = 0x04A0,
631 : PATCH__ADDRESS_5_HI = 0x04A0,
632 : PATCH__ADDRESS_5_LO = 0x04A1,
633 : PATCH__ADDRESS_6 = 0x04A2,
634 : PATCH__ADDRESS_6_HI = 0x04A2,
635 : PATCH__ADDRESS_6_LO = 0x04A3,
636 : PATCH__ADDRESS_7 = 0x04A4,
637 : PATCH__ADDRESS_7_HI = 0x04A4,
638 : PATCH__ADDRESS_7_LO = 0x04A5,
639 : PATCH__ADDRESS_8 = 0x04A6,
640 : PATCH__ADDRESS_8_HI = 0x04A6,
641 : PATCH__ADDRESS_8_LO = 0x04A7,
642 : PATCH__ADDRESS_9 = 0x04A8,
643 : PATCH__ADDRESS_9_HI = 0x04A8,
644 : PATCH__ADDRESS_9_LO = 0x04A9,
645 : PATCH__ADDRESS_10 = 0x04AA,
646 : PATCH__ADDRESS_10_HI = 0x04AA,
647 : PATCH__ADDRESS_10_LO = 0x04AB,
648 : PATCH__ADDRESS_11 = 0x04AC,
649 : PATCH__ADDRESS_11_HI = 0x04AC,
650 : PATCH__ADDRESS_11_LO = 0x04AD,
651 : PATCH__ADDRESS_12 = 0x04AE,
652 : PATCH__ADDRESS_12_HI = 0x04AE,
653 : PATCH__ADDRESS_12_LO = 0x04AF,
654 : PATCH__ADDRESS_13 = 0x04B0,
655 : PATCH__ADDRESS_13_HI = 0x04B0,
656 : PATCH__ADDRESS_13_LO = 0x04B1,
657 : PATCH__ADDRESS_14 = 0x04B2,
658 : PATCH__ADDRESS_14_HI = 0x04B2,
659 : PATCH__ADDRESS_14_LO = 0x04B3,
660 : PATCH__ADDRESS_15 = 0x04B4,
661 : PATCH__ADDRESS_15_HI = 0x04B4,
662 : PATCH__ADDRESS_15_LO = 0x04B5,
663 : SPI_ASYNC_MUX__CTRL = 0x04C0,
664 : CLK__CONFIG = 0x04C4,
665 : GPIO_LV_MUX__CTRL = 0x04CC,
666 : GPIO_LV_PAD__CTRL = 0x04CD,
667 : PAD_I2C_LV__CONFIG = 0x04D0,
668 : PAD_STARTUP_MODE__VALUE_RO_GO1 = 0x04D4,
669 : HOST_IF__STATUS_GO1 = 0x04D5,
670 : MCU_CLK_GATING__CTRL = 0x04D8,
671 : TEST__BIST_ROM_CTRL = 0x04E0,
672 : TEST__BIST_ROM_RESULT = 0x04E1,
673 : TEST__BIST_ROM_MCU_SIG = 0x04E2,
674 : TEST__BIST_ROM_MCU_SIG_HI = 0x04E2,
675 : TEST__BIST_ROM_MCU_SIG_LO = 0x04E3,
676 : TEST__BIST_RAM_CTRL = 0x04E4,
677 : TEST__BIST_RAM_RESULT = 0x04E5,
678 : TEST__TMC = 0x04E8,
679 : TEST__PLL_BIST_MIN_THRESHOLD = 0x04F0,
680 : TEST__PLL_BIST_MIN_THRESHOLD_HI = 0x04F0,
681 : TEST__PLL_BIST_MIN_THRESHOLD_LO = 0x04F1,
682 : TEST__PLL_BIST_MAX_THRESHOLD = 0x04F2,
683 : TEST__PLL_BIST_MAX_THRESHOLD_HI = 0x04F2,
684 : TEST__PLL_BIST_MAX_THRESHOLD_LO = 0x04F3,
685 : TEST__PLL_BIST_COUNT_OUT = 0x04F4,
686 : TEST__PLL_BIST_COUNT_OUT_HI = 0x04F4,
687 : TEST__PLL_BIST_COUNT_OUT_LO = 0x04F5,
688 : TEST__PLL_BIST_GONOGO = 0x04F6,
689 : TEST__PLL_BIST_CTRL = 0x04F7,
690 : RANGING_CORE__DEVICE_ID = 0x0680,
691 : RANGING_CORE__REVISION_ID = 0x0681,
692 : RANGING_CORE__CLK_CTRL1 = 0x0683,
693 : RANGING_CORE__CLK_CTRL2 = 0x0684,
694 : RANGING_CORE__WOI_1 = 0x0685,
695 : RANGING_CORE__WOI_REF_1 = 0x0686,
696 : RANGING_CORE__START_RANGING = 0x0687,
697 : RANGING_CORE__LOW_LIMIT_1 = 0x0690,
698 : RANGING_CORE__HIGH_LIMIT_1 = 0x0691,
699 : RANGING_CORE__LOW_LIMIT_REF_1 = 0x0692,
700 : RANGING_CORE__HIGH_LIMIT_REF_1 = 0x0693,
701 : RANGING_CORE__QUANTIFIER_1_MSB = 0x0694,
702 : RANGING_CORE__QUANTIFIER_1_LSB = 0x0695,
703 : RANGING_CORE__QUANTIFIER_REF_1_MSB = 0x0696,
704 : RANGING_CORE__QUANTIFIER_REF_1_LSB = 0x0697,
705 : RANGING_CORE__AMBIENT_OFFSET_1_MSB = 0x0698,
706 : RANGING_CORE__AMBIENT_OFFSET_1_LSB = 0x0699,
707 : RANGING_CORE__AMBIENT_OFFSET_REF_1_MSB = 0x069A,
708 : RANGING_CORE__AMBIENT_OFFSET_REF_1_LSB = 0x069B,
709 : RANGING_CORE__FILTER_STRENGTH_1 = 0x069C,
710 : RANGING_CORE__FILTER_STRENGTH_REF_1 = 0x069D,
711 : RANGING_CORE__SIGNAL_EVENT_LIMIT_1_MSB = 0x069E,
712 : RANGING_CORE__SIGNAL_EVENT_LIMIT_1_LSB = 0x069F,
713 : RANGING_CORE__SIGNAL_EVENT_LIMIT_REF_1_MSB = 0x06A0,
714 : RANGING_CORE__SIGNAL_EVENT_LIMIT_REF_1_LSB = 0x06A1,
715 : RANGING_CORE__TIMEOUT_OVERALL_PERIODS_MSB = 0x06A4,
716 : RANGING_CORE__TIMEOUT_OVERALL_PERIODS_LSB = 0x06A5,
717 : RANGING_CORE__INVERT_HW = 0x06A6,
718 : RANGING_CORE__FORCE_HW = 0x06A7,
719 : RANGING_CORE__STATIC_HW_VALUE = 0x06A8,
720 : RANGING_CORE__FORCE_CONTINUOUS_AMBIENT = 0x06A9,
721 : RANGING_CORE__TEST_PHASE_SELECT_TO_FILTER = 0x06AA,
722 : RANGING_CORE__TEST_PHASE_SELECT_TO_TIMING_GEN = 0x06AB,
723 : RANGING_CORE__INITIAL_PHASE_VALUE_1 = 0x06AC,
724 : RANGING_CORE__INITIAL_PHASE_VALUE_REF_1 = 0x06AD,
725 : RANGING_CORE__FORCE_UP_IN = 0x06AE,
726 : RANGING_CORE__FORCE_DN_IN = 0x06AF,
727 : RANGING_CORE__STATIC_UP_VALUE_1 = 0x06B0,
728 : RANGING_CORE__STATIC_UP_VALUE_REF_1 = 0x06B1,
729 : RANGING_CORE__STATIC_DN_VALUE_1 = 0x06B2,
730 : RANGING_CORE__STATIC_DN_VALUE_REF_1 = 0x06B3,
731 : RANGING_CORE__MONITOR_UP_DN = 0x06B4,
732 : RANGING_CORE__INVERT_UP_DN = 0x06B5,
733 : RANGING_CORE__CPUMP_1 = 0x06B6,
734 : RANGING_CORE__CPUMP_2 = 0x06B7,
735 : RANGING_CORE__CPUMP_3 = 0x06B8,
736 : RANGING_CORE__OSC_1 = 0x06B9,
737 : RANGING_CORE__PLL_1 = 0x06BB,
738 : RANGING_CORE__PLL_2 = 0x06BC,
739 : RANGING_CORE__REFERENCE_1 = 0x06BD,
740 : RANGING_CORE__REFERENCE_3 = 0x06BF,
741 : RANGING_CORE__REFERENCE_4 = 0x06C0,
742 : RANGING_CORE__REFERENCE_5 = 0x06C1,
743 : RANGING_CORE__REGAVDD1V2 = 0x06C3,
744 : RANGING_CORE__CALIB_1 = 0x06C4,
745 : RANGING_CORE__CALIB_2 = 0x06C5,
746 : RANGING_CORE__CALIB_3 = 0x06C6,
747 : RANGING_CORE__TST_MUX_SEL1 = 0x06C9,
748 : RANGING_CORE__TST_MUX_SEL2 = 0x06CA,
749 : RANGING_CORE__TST_MUX = 0x06CB,
750 : RANGING_CORE__GPIO_OUT_TESTMUX = 0x06CC,
751 : RANGING_CORE__CUSTOM_FE = 0x06CD,
752 : RANGING_CORE__CUSTOM_FE_2 = 0x06CE,
753 : RANGING_CORE__SPAD_READOUT = 0x06CF,
754 : RANGING_CORE__SPAD_READOUT_1 = 0x06D0,
755 : RANGING_CORE__SPAD_READOUT_2 = 0x06D1,
756 : RANGING_CORE__SPAD_PS = 0x06D2,
757 : RANGING_CORE__LASER_SAFETY_2 = 0x06D4,
758 : RANGING_CORE__NVM_CTRL__MODE = 0x0780,
759 : RANGING_CORE__NVM_CTRL__PDN = 0x0781,
760 : RANGING_CORE__NVM_CTRL__PROGN = 0x0782,
761 : RANGING_CORE__NVM_CTRL__READN = 0x0783,
762 : RANGING_CORE__NVM_CTRL__PULSE_WIDTH_MSB = 0x0784,
763 : RANGING_CORE__NVM_CTRL__PULSE_WIDTH_LSB = 0x0785,
764 : RANGING_CORE__NVM_CTRL__HV_RISE_MSB = 0x0786,
765 : RANGING_CORE__NVM_CTRL__HV_RISE_LSB = 0x0787,
766 : RANGING_CORE__NVM_CTRL__HV_FALL_MSB = 0x0788,
767 : RANGING_CORE__NVM_CTRL__HV_FALL_LSB = 0x0789,
768 : RANGING_CORE__NVM_CTRL__TST = 0x078A,
769 : RANGING_CORE__NVM_CTRL__TESTREAD = 0x078B,
770 : RANGING_CORE__NVM_CTRL__DATAIN_MMM = 0x078C,
771 : RANGING_CORE__NVM_CTRL__DATAIN_LMM = 0x078D,
772 : RANGING_CORE__NVM_CTRL__DATAIN_LLM = 0x078E,
773 : RANGING_CORE__NVM_CTRL__DATAIN_LLL = 0x078F,
774 : RANGING_CORE__NVM_CTRL__DATAOUT_MMM = 0x0790,
775 : RANGING_CORE__NVM_CTRL__DATAOUT_LMM = 0x0791,
776 : RANGING_CORE__NVM_CTRL__DATAOUT_LLM = 0x0792,
777 : RANGING_CORE__NVM_CTRL__DATAOUT_LLL = 0x0793,
778 : RANGING_CORE__NVM_CTRL__ADDR = 0x0794,
779 : RANGING_CORE__NVM_CTRL__DATAOUT_ECC = 0x0795,
780 : RANGING_CORE__RET_SPAD_EN_0 = 0x0796,
781 : RANGING_CORE__RET_SPAD_EN_1 = 0x0797,
782 : RANGING_CORE__RET_SPAD_EN_2 = 0x0798,
783 : RANGING_CORE__RET_SPAD_EN_3 = 0x0799,
784 : RANGING_CORE__RET_SPAD_EN_4 = 0x079A,
785 : RANGING_CORE__RET_SPAD_EN_5 = 0x079B,
786 : RANGING_CORE__RET_SPAD_EN_6 = 0x079C,
787 : RANGING_CORE__RET_SPAD_EN_7 = 0x079D,
788 : RANGING_CORE__RET_SPAD_EN_8 = 0x079E,
789 : RANGING_CORE__RET_SPAD_EN_9 = 0x079F,
790 : RANGING_CORE__RET_SPAD_EN_10 = 0x07A0,
791 : RANGING_CORE__RET_SPAD_EN_11 = 0x07A1,
792 : RANGING_CORE__RET_SPAD_EN_12 = 0x07A2,
793 : RANGING_CORE__RET_SPAD_EN_13 = 0x07A3,
794 : RANGING_CORE__RET_SPAD_EN_14 = 0x07A4,
795 : RANGING_CORE__RET_SPAD_EN_15 = 0x07A5,
796 : RANGING_CORE__RET_SPAD_EN_16 = 0x07A6,
797 : RANGING_CORE__RET_SPAD_EN_17 = 0x07A7,
798 : RANGING_CORE__SPAD_SHIFT_EN = 0x07BA,
799 : RANGING_CORE__SPAD_DISABLE_CTRL = 0x07BB,
800 : RANGING_CORE__SPAD_EN_SHIFT_OUT_DEBUG = 0x07BC,
801 : RANGING_CORE__SPI_MODE = 0x07BD,
802 : RANGING_CORE__GPIO_DIR = 0x07BE,
803 : RANGING_CORE__VCSEL_PERIOD = 0x0880,
804 : RANGING_CORE__VCSEL_START = 0x0881,
805 : RANGING_CORE__VCSEL_STOP = 0x0882,
806 : RANGING_CORE__VCSEL_1 = 0x0885,
807 : RANGING_CORE__VCSEL_STATUS = 0x088D,
808 : RANGING_CORE__STATUS = 0x0980,
809 : RANGING_CORE__LASER_CONTINUITY_STATE = 0x0981,
810 : RANGING_CORE__RANGE_1_MMM = 0x0982,
811 : RANGING_CORE__RANGE_1_LMM = 0x0983,
812 : RANGING_CORE__RANGE_1_LLM = 0x0984,
813 : RANGING_CORE__RANGE_1_LLL = 0x0985,
814 : RANGING_CORE__RANGE_REF_1_MMM = 0x0986,
815 : RANGING_CORE__RANGE_REF_1_LMM = 0x0987,
816 : RANGING_CORE__RANGE_REF_1_LLM = 0x0988,
817 : RANGING_CORE__RANGE_REF_1_LLL = 0x0989,
818 : RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_MMM = 0x098A,
819 : RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_LMM = 0x098B,
820 : RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_LLM = 0x098C,
821 : RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_LLL = 0x098D,
822 : RANGING_CORE__RANGING_TOTAL_EVENTS_1_MMM = 0x098E,
823 : RANGING_CORE__RANGING_TOTAL_EVENTS_1_LMM = 0x098F,
824 : RANGING_CORE__RANGING_TOTAL_EVENTS_1_LLM = 0x0990,
825 : RANGING_CORE__RANGING_TOTAL_EVENTS_1_LLL = 0x0991,
826 : RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_MMM = 0x0992,
827 : RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_LMM = 0x0993,
828 : RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_LLM = 0x0994,
829 : RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_LLL = 0x0995,
830 : RANGING_CORE__TOTAL_PERIODS_ELAPSED_1_MM = 0x0996,
831 : RANGING_CORE__TOTAL_PERIODS_ELAPSED_1_LM = 0x0997,
832 : RANGING_CORE__TOTAL_PERIODS_ELAPSED_1_LL = 0x0998,
833 : RANGING_CORE__AMBIENT_MISMATCH_MM = 0x0999,
834 : RANGING_CORE__AMBIENT_MISMATCH_LM = 0x099A,
835 : RANGING_CORE__AMBIENT_MISMATCH_LL = 0x099B,
836 : RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_MMM = 0x099C,
837 : RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_LMM = 0x099D,
838 : RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_LLM = 0x099E,
839 : RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_LLL = 0x099F,
840 : RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_MMM = 0x09A0,
841 : RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_LMM = 0x09A1,
842 : RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_LLM = 0x09A2,
843 : RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_LLL = 0x09A3,
844 : RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_MMM = 0x09A4,
845 : RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_LMM = 0x09A5,
846 : RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_LLM = 0x09A6,
847 : RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_LLL = 0x09A7,
848 : RANGING_CORE__TOTAL_PERIODS_ELAPSED_REF_1_MM = 0x09A8,
849 : RANGING_CORE__TOTAL_PERIODS_ELAPSED_REF_1_LM = 0x09A9,
850 : RANGING_CORE__TOTAL_PERIODS_ELAPSED_REF_1_LL = 0x09AA,
851 : RANGING_CORE__AMBIENT_MISMATCH_REF_MM = 0x09AB,
852 : RANGING_CORE__AMBIENT_MISMATCH_REF_LM = 0x09AC,
853 : RANGING_CORE__AMBIENT_MISMATCH_REF_LL = 0x09AD,
854 : RANGING_CORE__GPIO_CONFIG__A0 = 0x0A00,
855 : RANGING_CORE__RESET_CONTROL__A0 = 0x0A01,
856 : RANGING_CORE__INTR_MANAGER__A0 = 0x0A02,
857 : RANGING_CORE__POWER_FSM_TIME_OSC__A0 = 0x0A06,
858 : RANGING_CORE__VCSEL_ATEST__A0 = 0x0A07,
859 : RANGING_CORE__VCSEL_PERIOD_CLIPPED__A0 = 0x0A08,
860 : RANGING_CORE__VCSEL_STOP_CLIPPED__A0 = 0x0A09,
861 : RANGING_CORE__CALIB_2__A0 = 0x0A0A,
862 : RANGING_CORE__STOP_CONDITION__A0 = 0x0A0B,
863 : RANGING_CORE__STATUS_RESET__A0 = 0x0A0C,
864 : RANGING_CORE__READOUT_CFG__A0 = 0x0A0D,
865 : RANGING_CORE__WINDOW_SETTING__A0 = 0x0A0E,
866 : RANGING_CORE__VCSEL_DELAY__A0 = 0x0A1A,
867 : RANGING_CORE__REFERENCE_2__A0 = 0x0A1B,
868 : RANGING_CORE__REGAVDD1V2__A0 = 0x0A1D,
869 : RANGING_CORE__TST_MUX__A0 = 0x0A1F,
870 : RANGING_CORE__CUSTOM_FE_2__A0 = 0x0A20,
871 : RANGING_CORE__SPAD_READOUT__A0 = 0x0A21,
872 : RANGING_CORE__CPUMP_1__A0 = 0x0A22,
873 : RANGING_CORE__SPARE_REGISTER__A0 = 0x0A23,
874 : RANGING_CORE__VCSEL_CONT_STAGE5_BYPASS__A0 = 0x0A24,
875 : RANGING_CORE__RET_SPAD_EN_18 = 0x0A25,
876 : RANGING_CORE__RET_SPAD_EN_19 = 0x0A26,
877 : RANGING_CORE__RET_SPAD_EN_20 = 0x0A27,
878 : RANGING_CORE__RET_SPAD_EN_21 = 0x0A28,
879 : RANGING_CORE__RET_SPAD_EN_22 = 0x0A29,
880 : RANGING_CORE__RET_SPAD_EN_23 = 0x0A2A,
881 : RANGING_CORE__RET_SPAD_EN_24 = 0x0A2B,
882 : RANGING_CORE__RET_SPAD_EN_25 = 0x0A2C,
883 : RANGING_CORE__RET_SPAD_EN_26 = 0x0A2D,
884 : RANGING_CORE__RET_SPAD_EN_27 = 0x0A2E,
885 : RANGING_CORE__RET_SPAD_EN_28 = 0x0A2F,
886 : RANGING_CORE__RET_SPAD_EN_29 = 0x0A30,
887 : RANGING_CORE__RET_SPAD_EN_30 = 0x0A31,
888 : RANGING_CORE__RET_SPAD_EN_31 = 0x0A32,
889 : RANGING_CORE__REF_SPAD_EN_0__EWOK = 0x0A33,
890 : RANGING_CORE__REF_SPAD_EN_1__EWOK = 0x0A34,
891 : RANGING_CORE__REF_SPAD_EN_2__EWOK = 0x0A35,
892 : RANGING_CORE__REF_SPAD_EN_3__EWOK = 0x0A36,
893 : RANGING_CORE__REF_SPAD_EN_4__EWOK = 0x0A37,
894 : RANGING_CORE__REF_SPAD_EN_5__EWOK = 0x0A38,
895 : RANGING_CORE__REF_EN_START_SELECT = 0x0A39,
896 : RANGING_CORE__REGDVDD1V2_ATEST__EWOK = 0x0A41,
897 : SOFT_RESET_GO1 = 0x0B00,
898 : PRIVATE__PATCH_BASE_ADDR_RSLV = 0x0E00,
899 : PREV_SHADOW_RESULT__INTERRUPT_STATUS = 0x0ED0,
900 : PREV_SHADOW_RESULT__RANGE_STATUS = 0x0ED1,
901 : PREV_SHADOW_RESULT__REPORT_STATUS = 0x0ED2,
902 : PREV_SHADOW_RESULT__STREAM_COUNT = 0x0ED3,
903 : PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0 = 0x0ED4,
904 : PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_HI = 0x0ED4,
905 : PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_LO = 0x0ED5,
906 : PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0 = 0x0ED6,
907 : PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_HI = 0x0ED6,
908 : PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_LO = 0x0ED7,
909 : PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0 = 0x0ED8,
910 : PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_HI = 0x0ED8,
911 : PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_LO = 0x0ED9,
912 : PREV_SHADOW_RESULT__SIGMA_SD0 = 0x0EDA,
913 : PREV_SHADOW_RESULT__SIGMA_SD0_HI = 0x0EDA,
914 : PREV_SHADOW_RESULT__SIGMA_SD0_LO = 0x0EDB,
915 : PREV_SHADOW_RESULT__PHASE_SD0 = 0x0EDC,
916 : PREV_SHADOW_RESULT__PHASE_SD0_HI = 0x0EDC,
917 : PREV_SHADOW_RESULT__PHASE_SD0_LO = 0x0EDD,
918 : PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0 = 0x0EDE,
919 : PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_HI = 0x0EDE,
920 : PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_LO = 0x0EDF,
921 : PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0 = 0x0EE0,
922 : PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_HI = 0x0EE0,
923 : PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_LO = 0x0EE1,
924 : PREV_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0 = 0x0EE2,
925 : PREV_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_HI = 0x0EE2,
926 : PREV_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_LO = 0x0EE3,
927 : PREV_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0 = 0x0EE4,
928 : PREV_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_HI = 0x0EE4,
929 : PREV_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_LO = 0x0EE5,
930 : PREV_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0 = 0x0EE6,
931 : PREV_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_HI = 0x0EE6,
932 : PREV_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_LO = 0x0EE7,
933 : PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1 = 0x0EE8,
934 : PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_HI = 0x0EE8,
935 : PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_LO = 0x0EE9,
936 : PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1 = 0x0EEA,
937 : PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_HI = 0x0EEA,
938 : PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_LO = 0x0EEB,
939 : PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1 = 0x0EEC,
940 : PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_HI = 0x0EEC,
941 : PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_LO = 0x0EED,
942 : PREV_SHADOW_RESULT__SIGMA_SD1 = 0x0EEE,
943 : PREV_SHADOW_RESULT__SIGMA_SD1_HI = 0x0EEE,
944 : PREV_SHADOW_RESULT__SIGMA_SD1_LO = 0x0EEF,
945 : PREV_SHADOW_RESULT__PHASE_SD1 = 0x0EF0,
946 : PREV_SHADOW_RESULT__PHASE_SD1_HI = 0x0EF0,
947 : PREV_SHADOW_RESULT__PHASE_SD1_LO = 0x0EF1,
948 : PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1 = 0x0EF2,
949 : PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_HI = 0x0EF2,
950 : PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_LO = 0x0EF3,
951 : PREV_SHADOW_RESULT__SPARE_0_SD1 = 0x0EF4,
952 : PREV_SHADOW_RESULT__SPARE_0_SD1_HI = 0x0EF4,
953 : PREV_SHADOW_RESULT__SPARE_0_SD1_LO = 0x0EF5,
954 : PREV_SHADOW_RESULT__SPARE_1_SD1 = 0x0EF6,
955 : PREV_SHADOW_RESULT__SPARE_1_SD1_HI = 0x0EF6,
956 : PREV_SHADOW_RESULT__SPARE_1_SD1_LO = 0x0EF7,
957 : PREV_SHADOW_RESULT__SPARE_2_SD1 = 0x0EF8,
958 : PREV_SHADOW_RESULT__SPARE_2_SD1_HI = 0x0EF8,
959 : PREV_SHADOW_RESULT__SPARE_2_SD1_LO = 0x0EF9,
960 : PREV_SHADOW_RESULT__SPARE_3_SD1 = 0x0EFA,
961 : PREV_SHADOW_RESULT__SPARE_3_SD1_HI = 0x0EFA,
962 : PREV_SHADOW_RESULT__SPARE_3_SD1_LO = 0x0EFB,
963 : PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0 = 0x0EFC,
964 : PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_3 = 0x0EFC,
965 : PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_2 = 0x0EFD,
966 : PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_1 = 0x0EFE,
967 : PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_0 = 0x0EFF,
968 : PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0 = 0x0F00,
969 : PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_3 = 0x0F00,
970 : PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_2 = 0x0F01,
971 : PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_1 = 0x0F02,
972 : PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_0 = 0x0F03,
973 : PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0 = 0x0F04,
974 : PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_3 = 0x0F04,
975 : PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_2 = 0x0F05,
976 : PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_1 = 0x0F06,
977 : PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_0 = 0x0F07,
978 : PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0 = 0x0F08,
979 : PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_3 = 0x0F08,
980 : PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_2 = 0x0F09,
981 : PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_1 = 0x0F0A,
982 : PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_0 = 0x0F0B,
983 : PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1 = 0x0F0C,
984 : PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_3 = 0x0F0C,
985 : PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_2 = 0x0F0D,
986 : PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_1 = 0x0F0E,
987 : PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_0 = 0x0F0F,
988 : PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1 = 0x0F10,
989 : PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_3 = 0x0F10,
990 : PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_2 = 0x0F11,
991 : PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_1 = 0x0F12,
992 : PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_0 = 0x0F13,
993 : PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1 = 0x0F14,
994 : PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_3 = 0x0F14,
995 : PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_2 = 0x0F15,
996 : PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_1 = 0x0F16,
997 : PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_0 = 0x0F17,
998 : PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1 = 0x0F18,
999 : PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_3 = 0x0F18,
1000 : PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_2 = 0x0F19,
1001 : PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_1 = 0x0F1A,
1002 : PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_0 = 0x0F1B,
1003 : PREV_SHADOW_RESULT_CORE__SPARE_0 = 0x0F1C,
1004 : RESULT__DEBUG_STATUS = 0x0F20,
1005 : RESULT__DEBUG_STAGE = 0x0F21,
1006 : GPH__SYSTEM__THRESH_RATE_HIGH = 0x0F24,
1007 : GPH__SYSTEM__THRESH_RATE_HIGH_HI = 0x0F24,
1008 : GPH__SYSTEM__THRESH_RATE_HIGH_LO = 0x0F25,
1009 : GPH__SYSTEM__THRESH_RATE_LOW = 0x0F26,
1010 : GPH__SYSTEM__THRESH_RATE_LOW_HI = 0x0F26,
1011 : GPH__SYSTEM__THRESH_RATE_LOW_LO = 0x0F27,
1012 : GPH__SYSTEM__INTERRUPT_CONFIG_GPIO = 0x0F28,
1013 : GPH__DSS_CONFIG__ROI_MODE_CONTROL = 0x0F2F,
1014 : GPH__DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT = 0x0F30,
1015 : GPH__DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_HI = 0x0F30,
1016 : GPH__DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_LO = 0x0F31,
1017 : GPH__DSS_CONFIG__MANUAL_BLOCK_SELECT = 0x0F32,
1018 : GPH__DSS_CONFIG__MAX_SPADS_LIMIT = 0x0F33,
1019 : GPH__DSS_CONFIG__MIN_SPADS_LIMIT = 0x0F34,
1020 : GPH__MM_CONFIG__TIMEOUT_MACROP_A_HI = 0x0F36,
1021 : GPH__MM_CONFIG__TIMEOUT_MACROP_A_LO = 0x0F37,
1022 : GPH__MM_CONFIG__TIMEOUT_MACROP_B_HI = 0x0F38,
1023 : GPH__MM_CONFIG__TIMEOUT_MACROP_B_LO = 0x0F39,
1024 : GPH__RANGE_CONFIG__TIMEOUT_MACROP_A_HI = 0x0F3A,
1025 : GPH__RANGE_CONFIG__TIMEOUT_MACROP_A_LO = 0x0F3B,
1026 : GPH__RANGE_CONFIG__VCSEL_PERIOD_A = 0x0F3C,
1027 : GPH__RANGE_CONFIG__VCSEL_PERIOD_B = 0x0F3D,
1028 : GPH__RANGE_CONFIG__TIMEOUT_MACROP_B_HI = 0x0F3E,
1029 : GPH__RANGE_CONFIG__TIMEOUT_MACROP_B_LO = 0x0F3F,
1030 : GPH__RANGE_CONFIG__SIGMA_THRESH = 0x0F40,
1031 : GPH__RANGE_CONFIG__SIGMA_THRESH_HI = 0x0F40,
1032 : GPH__RANGE_CONFIG__SIGMA_THRESH_LO = 0x0F41,
1033 : GPH__RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS = 0x0F42,
1034 : GPH__RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_HI = 0x0F42,
1035 : GPH__RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_LO = 0x0F43,
1036 : GPH__RANGE_CONFIG__VALID_PHASE_LOW = 0x0F44,
1037 : GPH__RANGE_CONFIG__VALID_PHASE_HIGH = 0x0F45,
1038 : FIRMWARE__INTERNAL_STREAM_COUNT_DIV = 0x0F46,
1039 : FIRMWARE__INTERNAL_STREAM_COUNTER_VAL = 0x0F47,
1040 : DSS_CALC__ROI_CTRL = 0x0F54,
1041 : DSS_CALC__SPARE_1 = 0x0F55,
1042 : DSS_CALC__SPARE_2 = 0x0F56,
1043 : DSS_CALC__SPARE_3 = 0x0F57,
1044 : DSS_CALC__SPARE_4 = 0x0F58,
1045 : DSS_CALC__SPARE_5 = 0x0F59,
1046 : DSS_CALC__SPARE_6 = 0x0F5A,
1047 : DSS_CALC__SPARE_7 = 0x0F5B,
1048 : DSS_CALC__USER_ROI_SPAD_EN_0 = 0x0F5C,
1049 : DSS_CALC__USER_ROI_SPAD_EN_1 = 0x0F5D,
1050 : DSS_CALC__USER_ROI_SPAD_EN_2 = 0x0F5E,
1051 : DSS_CALC__USER_ROI_SPAD_EN_3 = 0x0F5F,
1052 : DSS_CALC__USER_ROI_SPAD_EN_4 = 0x0F60,
1053 : DSS_CALC__USER_ROI_SPAD_EN_5 = 0x0F61,
1054 : DSS_CALC__USER_ROI_SPAD_EN_6 = 0x0F62,
1055 : DSS_CALC__USER_ROI_SPAD_EN_7 = 0x0F63,
1056 : DSS_CALC__USER_ROI_SPAD_EN_8 = 0x0F64,
1057 : DSS_CALC__USER_ROI_SPAD_EN_9 = 0x0F65,
1058 : DSS_CALC__USER_ROI_SPAD_EN_10 = 0x0F66,
1059 : DSS_CALC__USER_ROI_SPAD_EN_11 = 0x0F67,
1060 : DSS_CALC__USER_ROI_SPAD_EN_12 = 0x0F68,
1061 : DSS_CALC__USER_ROI_SPAD_EN_13 = 0x0F69,
1062 : DSS_CALC__USER_ROI_SPAD_EN_14 = 0x0F6A,
1063 : DSS_CALC__USER_ROI_SPAD_EN_15 = 0x0F6B,
1064 : DSS_CALC__USER_ROI_SPAD_EN_16 = 0x0F6C,
1065 : DSS_CALC__USER_ROI_SPAD_EN_17 = 0x0F6D,
1066 : DSS_CALC__USER_ROI_SPAD_EN_18 = 0x0F6E,
1067 : DSS_CALC__USER_ROI_SPAD_EN_19 = 0x0F6F,
1068 : DSS_CALC__USER_ROI_SPAD_EN_20 = 0x0F70,
1069 : DSS_CALC__USER_ROI_SPAD_EN_21 = 0x0F71,
1070 : DSS_CALC__USER_ROI_SPAD_EN_22 = 0x0F72,
1071 : DSS_CALC__USER_ROI_SPAD_EN_23 = 0x0F73,
1072 : DSS_CALC__USER_ROI_SPAD_EN_24 = 0x0F74,
1073 : DSS_CALC__USER_ROI_SPAD_EN_25 = 0x0F75,
1074 : DSS_CALC__USER_ROI_SPAD_EN_26 = 0x0F76,
1075 : DSS_CALC__USER_ROI_SPAD_EN_27 = 0x0F77,
1076 : DSS_CALC__USER_ROI_SPAD_EN_28 = 0x0F78,
1077 : DSS_CALC__USER_ROI_SPAD_EN_29 = 0x0F79,
1078 : DSS_CALC__USER_ROI_SPAD_EN_30 = 0x0F7A,
1079 : DSS_CALC__USER_ROI_SPAD_EN_31 = 0x0F7B,
1080 : DSS_CALC__USER_ROI_0 = 0x0F7C,
1081 : DSS_CALC__USER_ROI_1 = 0x0F7D,
1082 : DSS_CALC__MODE_ROI_0 = 0x0F7E,
1083 : DSS_CALC__MODE_ROI_1 = 0x0F7F,
1084 : SIGMA_ESTIMATOR_CALC__SPARE_0 = 0x0F80,
1085 : VHV_RESULT__PEAK_SIGNAL_RATE_MCPS = 0x0F82,
1086 : VHV_RESULT__PEAK_SIGNAL_RATE_MCPS_HI = 0x0F82,
1087 : VHV_RESULT__PEAK_SIGNAL_RATE_MCPS_LO = 0x0F83,
1088 : VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF = 0x0F84,
1089 : VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_3 = 0x0F84,
1090 : VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_2 = 0x0F85,
1091 : VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_1 = 0x0F86,
1092 : VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_0 = 0x0F87,
1093 : PHASECAL_RESULT__PHASE_OUTPUT_REF = 0x0F88,
1094 : PHASECAL_RESULT__PHASE_OUTPUT_REF_HI = 0x0F88,
1095 : PHASECAL_RESULT__PHASE_OUTPUT_REF_LO = 0x0F89,
1096 : DSS_RESULT__TOTAL_RATE_PER_SPAD = 0x0F8A,
1097 : DSS_RESULT__TOTAL_RATE_PER_SPAD_HI = 0x0F8A,
1098 : DSS_RESULT__TOTAL_RATE_PER_SPAD_LO = 0x0F8B,
1099 : DSS_RESULT__ENABLED_BLOCKS = 0x0F8C,
1100 : DSS_RESULT__NUM_REQUESTED_SPADS = 0x0F8E,
1101 : DSS_RESULT__NUM_REQUESTED_SPADS_HI = 0x0F8E,
1102 : DSS_RESULT__NUM_REQUESTED_SPADS_LO = 0x0F8F,
1103 : MM_RESULT__INNER_INTERSECTION_RATE = 0x0F92,
1104 : MM_RESULT__INNER_INTERSECTION_RATE_HI = 0x0F92,
1105 : MM_RESULT__INNER_INTERSECTION_RATE_LO = 0x0F93,
1106 : MM_RESULT__OUTER_COMPLEMENT_RATE = 0x0F94,
1107 : MM_RESULT__OUTER_COMPLEMENT_RATE_HI = 0x0F94,
1108 : MM_RESULT__OUTER_COMPLEMENT_RATE_LO = 0x0F95,
1109 : MM_RESULT__TOTAL_OFFSET = 0x0F96,
1110 : MM_RESULT__TOTAL_OFFSET_HI = 0x0F96,
1111 : MM_RESULT__TOTAL_OFFSET_LO = 0x0F97,
1112 : XTALK_CALC__XTALK_FOR_ENABLED_SPADS = 0x0F98,
1113 : XTALK_CALC__XTALK_FOR_ENABLED_SPADS_3 = 0x0F98,
1114 : XTALK_CALC__XTALK_FOR_ENABLED_SPADS_2 = 0x0F99,
1115 : XTALK_CALC__XTALK_FOR_ENABLED_SPADS_1 = 0x0F9A,
1116 : XTALK_CALC__XTALK_FOR_ENABLED_SPADS_0 = 0x0F9B,
1117 : XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS = 0x0F9C,
1118 : XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_3 = 0x0F9C,
1119 : XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_2 = 0x0F9D,
1120 : XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_1 = 0x0F9E,
1121 : XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_0 = 0x0F9F,
1122 : XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS = 0x0FA0,
1123 : XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_3 = 0x0FA0,
1124 : XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_2 = 0x0FA1,
1125 : XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_1 = 0x0FA2,
1126 : XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_0 = 0x0FA3,
1127 : XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS = 0x0FA4,
1128 : XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_3 = 0x0FA4,
1129 : XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_2 = 0x0FA5,
1130 : XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_1 = 0x0FA6,
1131 : XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_0 = 0x0FA7,
1132 : RANGE_RESULT__ACCUM_PHASE = 0x0FA8,
1133 : RANGE_RESULT__ACCUM_PHASE_3 = 0x0FA8,
1134 : RANGE_RESULT__ACCUM_PHASE_2 = 0x0FA9,
1135 : RANGE_RESULT__ACCUM_PHASE_1 = 0x0FAA,
1136 : RANGE_RESULT__ACCUM_PHASE_0 = 0x0FAB,
1137 : RANGE_RESULT__OFFSET_CORRECTED_RANGE = 0x0FAC,
1138 : RANGE_RESULT__OFFSET_CORRECTED_RANGE_HI = 0x0FAC,
1139 : RANGE_RESULT__OFFSET_CORRECTED_RANGE_LO = 0x0FAD,
1140 : SHADOW_PHASECAL_RESULT__VCSEL_START = 0x0FAE,
1141 : SHADOW_RESULT__INTERRUPT_STATUS = 0x0FB0,
1142 : SHADOW_RESULT__RANGE_STATUS = 0x0FB1,
1143 : SHADOW_RESULT__REPORT_STATUS = 0x0FB2,
1144 : SHADOW_RESULT__STREAM_COUNT = 0x0FB3,
1145 : SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0 = 0x0FB4,
1146 : SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_HI = 0x0FB4,
1147 : SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_LO = 0x0FB5,
1148 : SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0 = 0x0FB6,
1149 : SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_HI = 0x0FB6,
1150 : SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_LO = 0x0FB7,
1151 : SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0 = 0x0FB8,
1152 : SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_HI = 0x0FB8,
1153 : SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_LO = 0x0FB9,
1154 : SHADOW_RESULT__SIGMA_SD0 = 0x0FBA,
1155 : SHADOW_RESULT__SIGMA_SD0_HI = 0x0FBA,
1156 : SHADOW_RESULT__SIGMA_SD0_LO = 0x0FBB,
1157 : SHADOW_RESULT__PHASE_SD0 = 0x0FBC,
1158 : SHADOW_RESULT__PHASE_SD0_HI = 0x0FBC,
1159 : SHADOW_RESULT__PHASE_SD0_LO = 0x0FBD,
1160 : SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0 = 0x0FBE,
1161 : SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_HI = 0x0FBE,
1162 : SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_LO = 0x0FBF,
1163 : SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0 = 0x0FC0,
1164 : SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_HI = 0x0FC0,
1165 : SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_LO = 0x0FC1,
1166 : SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0 = 0x0FC2,
1167 : SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_HI = 0x0FC2,
1168 : SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_LO = 0x0FC3,
1169 : SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0 = 0x0FC4,
1170 : SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_HI = 0x0FC4,
1171 : SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_LO = 0x0FC5,
1172 : SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0 = 0x0FC6,
1173 : SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_HI = 0x0FC6,
1174 : SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_LO = 0x0FC7,
1175 : SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1 = 0x0FC8,
1176 : SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_HI = 0x0FC8,
1177 : SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_LO = 0x0FC9,
1178 : SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1 = 0x0FCA,
1179 : SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_HI = 0x0FCA,
1180 : SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_LO = 0x0FCB,
1181 : SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1 = 0x0FCC,
1182 : SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_HI = 0x0FCC,
1183 : SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_LO = 0x0FCD,
1184 : SHADOW_RESULT__SIGMA_SD1 = 0x0FCE,
1185 : SHADOW_RESULT__SIGMA_SD1_HI = 0x0FCE,
1186 : SHADOW_RESULT__SIGMA_SD1_LO = 0x0FCF,
1187 : SHADOW_RESULT__PHASE_SD1 = 0x0FD0,
1188 : SHADOW_RESULT__PHASE_SD1_HI = 0x0FD0,
1189 : SHADOW_RESULT__PHASE_SD1_LO = 0x0FD1,
1190 : SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1 = 0x0FD2,
1191 : SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_HI = 0x0FD2,
1192 : SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_LO = 0x0FD3,
1193 : SHADOW_RESULT__SPARE_0_SD1 = 0x0FD4,
1194 : SHADOW_RESULT__SPARE_0_SD1_HI = 0x0FD4,
1195 : SHADOW_RESULT__SPARE_0_SD1_LO = 0x0FD5,
1196 : SHADOW_RESULT__SPARE_1_SD1 = 0x0FD6,
1197 : SHADOW_RESULT__SPARE_1_SD1_HI = 0x0FD6,
1198 : SHADOW_RESULT__SPARE_1_SD1_LO = 0x0FD7,
1199 : SHADOW_RESULT__SPARE_2_SD1 = 0x0FD8,
1200 : SHADOW_RESULT__SPARE_2_SD1_HI = 0x0FD8,
1201 : SHADOW_RESULT__SPARE_2_SD1_LO = 0x0FD9,
1202 : SHADOW_RESULT__SPARE_3_SD1 = 0x0FDA,
1203 : SHADOW_RESULT__THRESH_INFO = 0x0FDB,
1204 : SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0 = 0x0FDC,
1205 : SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_3 = 0x0FDC,
1206 : SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_2 = 0x0FDD,
1207 : SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_1 = 0x0FDE,
1208 : SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_0 = 0x0FDF,
1209 : SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0 = 0x0FE0,
1210 : SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_3 = 0x0FE0,
1211 : SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_2 = 0x0FE1,
1212 : SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_1 = 0x0FE2,
1213 : SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_0 = 0x0FE3,
1214 : SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0 = 0x0FE4,
1215 : SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_3 = 0x0FE4,
1216 : SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_2 = 0x0FE5,
1217 : SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_1 = 0x0FE6,
1218 : SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_0 = 0x0FE7,
1219 : SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0 = 0x0FE8,
1220 : SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_3 = 0x0FE8,
1221 : SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_2 = 0x0FE9,
1222 : SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_1 = 0x0FEA,
1223 : SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_0 = 0x0FEB,
1224 : SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1 = 0x0FEC,
1225 : SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_3 = 0x0FEC,
1226 : SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_2 = 0x0FED,
1227 : SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_1 = 0x0FEE,
1228 : SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_0 = 0x0FEF,
1229 : SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1 = 0x0FF0,
1230 : SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_3 = 0x0FF0,
1231 : SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_2 = 0x0FF1,
1232 : SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_1 = 0x0FF2,
1233 : SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_0 = 0x0FF3,
1234 : SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1 = 0x0FF4,
1235 : SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_3 = 0x0FF4,
1236 : SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_2 = 0x0FF5,
1237 : SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_1 = 0x0FF6,
1238 : SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_0 = 0x0FF7,
1239 : SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1 = 0x0FF8,
1240 : SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_3 = 0x0FF8,
1241 : SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_2 = 0x0FF9,
1242 : SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_1 = 0x0FFA,
1243 : SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_0 = 0x0FFB,
1244 : SHADOW_RESULT_CORE__SPARE_0 = 0x0FFC,
1245 : SHADOW_PHASECAL_RESULT__REFERENCE_PHASE_HI = 0x0FFE,
1246 : SHADOW_PHASECAL_RESULT__REFERENCE_PHASE_LO = 0x0FFF,
1247 : };
1248 :
1249 : // constructor
1250 : AP_RangeFinder_VL53L1X(RangeFinder::RangeFinder_State &_state, AP_RangeFinder_Params &_params, AP_HAL::OwnPtr<AP_HAL::I2CDevice> dev);
1251 :
1252 : __INITFUNC__ bool init(DistanceMode mode);
1253 : void timer();
1254 :
1255 : // check sensor ID
1256 : bool check_id(void);
1257 :
1258 : // get a reading
1259 : bool get_reading(uint16_t &reading_cm);
1260 : AP_HAL::OwnPtr<AP_HAL::I2CDevice> dev;
1261 :
1262 : // value used in measurement timing budget calculations
1263 : // assumes PresetMode is LOWPOWER_AUTONOMOUS
1264 : //
1265 : // vhv = LOWPOWER_AUTO_VHV_LOOP_DURATION_US + LOWPOWERAUTO_VHV_LOOP_BOUND
1266 : // (tuning parm default) * LOWPOWER_AUTO_VHV_LOOP_DURATION_US
1267 : // = 245 + 3 * 245 = 980
1268 : // TimingGuard = LOWPOWER_AUTO_OVERHEAD_BEFORE_A_RANGING +
1269 : // LOWPOWER_AUTO_OVERHEAD_BETWEEN_A_B_RANGING + vhv
1270 : // = 1448 + 2100 + 980 = 4528
1271 : static const uint32_t TimingGuard = 4528;
1272 :
1273 : // value in DSS_CONFIG__TARGET_TOTAL_RATE_MCPS register,
1274 : // used in DSS calculations
1275 : static const uint16_t TargetRate = 0x0A00;
1276 :
1277 : uint16_t fast_osc_frequency;
1278 : uint16_t osc_calibrate_val;
1279 : uint32_t sum_mm;
1280 : uint32_t counter;
1281 : bool calibrated;
1282 :
1283 : bool read_register(uint16_t reg, uint8_t &value) WARN_IF_UNUSED;
1284 : bool read_register16(uint16_t reg, uint16_t &value) WARN_IF_UNUSED;
1285 : bool write_register(uint16_t reg, uint8_t value) WARN_IF_UNUSED;
1286 : bool write_register16(uint16_t reg, uint16_t value) WARN_IF_UNUSED;
1287 : bool write_register32(uint16_t reg, uint32_t value) WARN_IF_UNUSED;
1288 : bool dataReady(void);
1289 : bool reset(void) WARN_IF_UNUSED;
1290 : bool setDistanceMode(DistanceMode distance_mode) WARN_IF_UNUSED;
1291 : bool setMeasurementTimingBudget(uint32_t budget_us) WARN_IF_UNUSED;
1292 : bool getMeasurementTimingBudget(uint32_t &budget) WARN_IF_UNUSED;
1293 : bool startContinuous(uint32_t period_ms) WARN_IF_UNUSED;
1294 : uint32_t decodeTimeout(uint16_t reg_val);
1295 : uint16_t encodeTimeout(uint32_t timeout_mclks);
1296 : uint32_t timeoutMclksToMicroseconds(uint32_t timeout_mclks, uint32_t macro_period_us);
1297 : uint32_t timeoutMicrosecondsToMclks(uint32_t timeout_us, uint32_t macro_period_us);
1298 : uint32_t calcMacroPeriod(uint8_t vcsel_period) const;
1299 : bool setupManualCalibration(void);
1300 : };
1301 :
1302 : #endif // AP_RANGEFINDER_VL53L1X_ENABLED
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